Fast DCT apparatus

摘要

An apparatus and a method for performing discrete cosine transformation (DCT) are presented. The apparatus includes an arithmetic circuit interconnected with a transpose memory. The arithmetic circuit includes a combinatorial circuit for calculating a DCT without using an intermediate clocked storage unit. The combinatorial circuit includes a predetermined number of sequentially arranged stages for implementing the DCT. The apparatus may optionally include a controller for controlling operation of the apparatus and a multiplexer for multiplexing data input to the apparatus and data from the transpose memory. An apparatus and a method for performing inverse discrete cosine transformation (IDCT) are also presented.