| 摘要 |
A data storage system wherein a host computer section having host computer processors for processing data is coupled to a bank of disk drives through an interface. The interface includes a plurality of controllers coupled to a bus. Each one of the controllers is adapted to request a data transfer between the bus and an addressed one of the addressable memories. Each such request is transmitted to the addressed one of the memories in bursts. Each one of the bursts in a request has a tag unique to such request. The bursts from one of the requesting controllers to the one of the addressed memories addressed by such one of the controllers are interleaved with bursts of requests from another one of the requesting controllers to the same or another one of the addressed memories addressed by said another one of the controllers. Each one of the addressable memories has a control logic coupled to the bus for receiving the request from the one of the controllers addressing such one of the addressable memories. The control logic has a storage section. The addressable memory includes a random access memory coupled to the bus through the control logic. An error detector is included in the addressable memory for detecting an error in the addressable memory when transferring data between the bus and the random access memory. The control logic stores in the storage section a cumulative error message produced in response to the error detector processing each one of the bursts of requests and for reports the cumulative error to the one of the controllers making such request.
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