| 摘要 |
A device for communication, between at least two asynchronous computer buses, having at least one intermediate storage unit adapted to be accessed in read and/or write mode at least two different frequencies. Each computer bus includes an adapter for interfacing between the computer bus and a memory. Each adapter has an adapter memory and two bidirectional ports, one of the bidirectional ports being connected to the computer bus and the other bidirectional port being connected to the storage unit. Each intermediate storage unit can be accessed in write and/or read mode by each of the computer buses and the interface adapter which is associated with the computer bus.
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