| 摘要 |
PROBLEM TO BE SOLVED: To prevent misoperations of a DRAM gain cell. SOLUTION: A semiconductor storage device comprises, in a memory cell MC, a capacitor CAP having one electrode connected with a read word line RWL, a first conductivity-type read transistor TR connected between the feeder line VDD of power supply voltage and a bit line BL and having a control electrode connected with the other electrode of the capacitor CAP, and a second conductivity-type write transistor TW connected between the other electrode of the capacitor CAP and the bit line BL and having a control electrode connected with a write word line WWL. The word line is provided for each transistor, and the operational margin of each transistor is enlarged with respect to the word line applying voltage. |
