| 摘要 |
PROBLEM TO BE SOLVED: To provide a bias voltage generating circuit wherein the variation in threshold voltage does not affect a bias voltage, related to a semiconductor integrated circuit where the active layer of a FET is used as a resistance element. SOLUTION: A diode D0 where an anode is connected to a power source voltage VDD, a resistor R0 connected in series to the cathode of the diode D0, a depletion field-effect transistor Q1 connected in series between the resistor R0 and a ground voltage GND, and a bias voltage take-out terminal T provided between the cathode of the diode D0 and the resistor R0, are provided. A drain of the transistor Q1 is connected to the resistor R0 while both source and gate grounded.
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