发明名称 KEY MATRIX CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a circuit constitution minimizing the number of inputting lines to a microcomputer circuit form a key matrix circuit. SOLUTION: In this key matrix circuit, a switch circuit consisting of a first terminal 4 and a second terminal 5 to be ON/OFF-connected to a common ground circuit 3 is constituted in each key of N (rows)×M (columns), a first voltage dividing circuit 30x is constituted between a connecting circuit 6-1 connected with each terminal 4 at a first row and a constant voltage power source Vcc, a second voltage dividing circuit 30y is constituted between a connecting circuit 7-1 connected with the terminal 5 at a first column and the power source Vcc, connecting circuits 6-2 to 4 at the other rows are connected between each of the resistors (R1 to R4) of the circuit 30x, and connecting circuits 7-2 to 4 at the other columns are connected between each of the resistors (R5 to R8) of the circuit 30y. A microcomputer circuit 40 identifies a selection key based on the combination of the connecting point output Vx of R1 and R2 of the circuit 30x and the connecting point output Vy of R5 and R6 of the circuit 30y.
申请公布号 JP2001051774(A) 申请公布日期 2001.02.23
申请号 JP19990220965 申请日期 1999.08.04
申请人 VERTEX STANDARD CO LTD 发明人 FUJIKI SHIRO
分类号 G06F3/02;H01H13/702;H03M11/24;(IPC1-7):G06F3/02 主分类号 G06F3/02
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