发明名称 TEST CIRCUIT DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND TEST METHOD
摘要 PROBLEM TO BE SOLVED: To obtain a test circuit device for a semiconductor integrated circuit in which a test time can be largely shortened for a semiconductor integrated circuit incorporating a DRAM. SOLUTION: In a test circuit device for a semiconductor integrated circuit in which a logic circuit and a DRAM are incorporated, the device is constituted so that a test signal is applied to a logic circuit LG by an input/output pad 2 through a system address bus 5 at the time of testing a wafer. The device is provided with a pad 30 for applying a test signal which is connected to a DRAM section 1 through a multiplexer selecting a signal of the system address bus 5 and a signal for the DRAM 1 in order to apply a test signal to the DRAM section 1 at the same time when a test signal is applied to the logic circuit LG by the input/output pad 2.
申请公布号 JP2001052500(A) 申请公布日期 2001.02.23
申请号 JP19990221019 申请日期 1999.08.04
申请人 MITSUBISHI ELECTRIC CORP 发明人 SATO HISAMUNE
分类号 G01R31/28;G11C29/00;G11C29/02;(IPC1-7):G11C29/00 主分类号 G01R31/28
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