发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enable a PLL circuit to be locked in a short time and operate normally even when a VCO(voltage-controlled oscillator) has reverse characteristics. SOLUTION: An effective range is set for a control voltage (f) making the VCO 24 operate to prevent the VCO 24 from operating in a reverse characteristic area. A monitor circuit 26 which monitors the control voltage (f) is provided and when the control voltage (f) deviates from the effective range, the monitor circuit 26 outputs a monitor signal (i) to a charge pump 22. The charge pump 22 once inputting the monitor signal (i) generates a fixed voltage. Consequently, when a reference signal (a) is not inputted, the control voltage is put in the specific voltage range and the VCO 24 oscillates within a specific frequency range.
申请公布号 JP2001053605(A) 申请公布日期 2001.02.23
申请号 JP19990222838 申请日期 1999.08.05
申请人 FUJITSU QUANTUM DEVICES LTD 发明人 MATSUNO SHIGETO
分类号 H03L7/14;H03L7/089;H03L7/093;H03L7/10;H03L7/18 主分类号 H03L7/14
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