发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit, together with its testing method, wherein a test mode is easily set with no test mode terminal provided nor limited to a use condition, related to a semiconductor integrated circuit comprising a normal operation mode and a test mode. SOLUTION: A semiconductor integrated circuit comprises a normal operation mode and a test mode. Here, an output driver circuit 11 which operates when a power source voltage VDD on a high electric potential side and a power source voltage VSS on low electric potential side are supplied, an output terminal 12 electrically connected to the output of the output driver circuit 11, a comparator circuit which compares a voltage applied to the output terminal 12 from the outside to either the high electric potential side power source voltage VDD or low electric potential side power source voltage VSS, and a test mode control means 14 which controls so that the semiconductor integrated circuit is in a test mode based on the comparison result at the comparator circuit, are provided.
申请公布号 JP2001053232(A) 申请公布日期 2001.02.23
申请号 JP19990222449 申请日期 1999.08.05
申请人 SEIKO EPSON CORP 发明人 KOBAYASHI KATSUMI
分类号 G01R31/28;G01R31/3185;H01L21/822;H01L27/04;(IPC1-7):H01L27/04;G01R31/318 主分类号 G01R31/28
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