发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory in which inversion write can be performed at high speed by avoiding a trouble that voltage applied to a bit line through a common data line conflicts with amplifying operation of a bit line potential by a sense amplifier, when inversion data are written in a memory cell, in a semiconductor memory constituted so that voltage of a bit line is amplified using a sense amplifier. SOLUTION: This device is provided with a sense amplifier control circuit 30 which can control a sense amplifier SA to be semi-active or non-active at timing when bit lines BL,/BL and common data lines IO,/IO are connected by a column switch 21. The device is constituted so that write speed of the inversion data for a memory cell is increased not by operating the sense amplifier SA at the time of writing data in an arbitrary memory cell MC.
申请公布号 JP2001052482(A) 申请公布日期 2001.02.23
申请号 JP19990222302 申请日期 1999.08.05
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 OTA AKIRA
分类号 G11C11/409;(IPC1-7):G11C11/409 主分类号 G11C11/409
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