发明名称 METHOD FOR INSPECTING DEFLECT AND ANALYZING CHARACTERISTICS OF WAFER
摘要 PROBLEM TO BE SOLVED: To automate a semiconductor inspection process, comprising the steps of defect inspection, defect location and defect characteristics analysis by forming a plurality of alignment marks on the outer circumference of a wafer before machining and converting the coordinates between an inspection tool and a characteristics analyzing tool with reference to on alignment mark. SOLUTION: Before a wafer is machined through an IC fabrication process, a plurality of alignment marks for location are formed on the outer circumference of the wafer. A machined wafer is inspected by means of an inspection tool and transferred to a characteristics analyzing tool for location. Defect position in the coordinate system of the inspection tool is converted into the coordinate system of the characteristics analyzing tool with reference to the alignment mark, so that the defect can be located easily and utilized in the characteristics analysis by means of the characteristics analyzing tool, thus automating the semiconductor inspection process.
申请公布号 JP2001053118(A) 申请公布日期 2001.02.23
申请号 JP19990338643 申请日期 1999.11.29
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD 发明人 TO EKIYU;YO SHINZAN;RIN SHIKEN;TEI KAIGEN;KO JOYU
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址
您可能感兴趣的专利