发明名称 CERAMIC PACKAGE FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a ceramic package for a semiconductor device, which does not generate cracks due to stress and can improve I/O isolation characteristic. SOLUTION: An inner wall surface in a lead penetration part of a sidewall part 10d, disposed in upright around a chip mounting region, is positioned on the same surface as the inner wall surface of a ceramic part 15a formed in the lead penetration part. On the interface between the ceramic part 15a and the inner wall surface 17 of the sidewall part 10d, a gap 16 is so formed that airtightness of a space forming the chip-mounting region is ensured.
申请公布号 JP2001053182(A) 申请公布日期 2001.02.23
申请号 JP19990230452 申请日期 1999.08.17
申请人 NEC YAMAGATA LTD 发明人 KATAHIRA YASUSHI
分类号 H01L23/08;H01L23/10;H01L23/66;(IPC1-7):H01L23/08 主分类号 H01L23/08
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