发明名称 METHOD FOR PRODUCING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To increase production yield, while reducing continuity faults by filling the interconnection plane including interconnection trenches formed on a semiconductor substrate or contact holes made in the interconnection trenches with liquid thereby preventing generation of void in the interconnection plane of a wafer. SOLUTION: Trenches in an insulation film can be filled with pure water 102, and bubbles can be removed by spraying pure water to the interconnection plane prior to a plating process, and plating liquid 108 can be spread sufficiently in the trench in the following process. After filling a cell 107, the plating liquid 108 is jetted uniformly from the central part of a semiconductor substrate 1a toward the end part thereof. After the plating liquid 108 touches the semiconductor substrate 1a, electrolysis is started, and a field plating layer of 0.7μm thickness is formed on the interconnection plane of the semiconductor substrate 1a. After the semiconductor substrate is cleaned by spraying pure water from a nozzle 101 which is reciprocated, a rotor 104 is rotated and the semiconductor substrate 1a is dried. According to this method, a good conductor film can be formed in a fine trench without generating voids.
申请公布号 JP2001053150(A) 申请公布日期 2001.02.23
申请号 JP19990228110 申请日期 1999.08.12
申请人 HITACHI LTD 发明人 TAKADA YUJI
分类号 H01L21/768;H01L21/288;(IPC1-7):H01L21/768 主分类号 H01L21/768
代理机构 代理人
主权项
地址