| 摘要 |
<p>Nonvolatile memory having, in order to record multi-valued data, first and second source/drain regions (SD1, SD2) on a semiconductor substrate surface, and a non-conductive trap gate (TG) and a conductive floating gate (CG) on a channel region between the first and second regions via an insulating film. A memory cell which has a first or second status where hot electrons generated in the vicinity of the first or second source/drain region are captured locally into a first or second trap gate region (TSD1, TSD2) in the vicinity of the source/drain regions, and a third status where electrons are injected into the entire trap gate (TG), thereby recording 3-bit information.</p> |
