发明名称 |
Semiconductor device used as a DRAM of a capacitor-over-bitline has a lower insulating layer covering source/drain regions, an upper insulating layer and storage node contacts |
摘要 |
Semiconductor device has a lower insulating layer (6) covering source/drain regions (5) electrically connected to capacitors (14); an upper insulating layer (7, 10) lying above the lower insulating layer, and storage node contacts (11) which penetrate the lower and upper insulating layers and reach the source-drain regions. The whole surfaces of the source/drain regions containing regions open into which the nodes open out are essentially flat. An Independent claim is also included for a process for the production of the semiconductor device. Preferred Features: The upper insulating layer is a silicon oxide layer and the lower insulating layer is a silicon nitride layer.
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申请公布号 |
DE10024361(A1) |
申请公布日期 |
2001.02.22 |
申请号 |
DE20001024361 |
申请日期 |
2000.05.17 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO |
发明人 |
MATSUOKA, TAKERU;TSUKAMOTO, KAZUHIRO |
分类号 |
H01L27/108;H01L21/8242;(IPC1-7):H01L27/108;H01L21/824 |
主分类号 |
H01L27/108 |
代理机构 |
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主权项 |
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地址 |
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