EXCEPTION HANDLING FOR SIMD FLOATING POINT-INSTRUCTIONS

摘要

A method, apparatus, and computer program product for handling IEEE 754 standard exceptions for Single Instruction Multiple Data (SIMD) operations. Each SIMD sub-instruction's corresponding IEEE 754 exception flag 502 is bit-wise "ORed" 612 with an accrued exception field 506 if a trap enable mask field 504 is configured to mask the exception, with the "ORed" result written back in the accrued exception field 506. If the trap enable mask field 504 is configured to enable the exception, the accrued exception field 506 and a current exception field 508 are cleared, and an unfinished floating-point exception flag is set in a floating-point trap type field 502. The actual sub-instruction(s) causing the exception is determined through software.