发明名称 METHOD FOR FABRICATING INTEGRATED CIRCUITS
摘要 Functional (102, 202) and geometrical sub-components (4, 6, 8, 10, 12, 14, 16, 306, 308, 310, 312, 314, 316) of logic circuits (102, 202) are defined and used in the design of integrated circuits to facilitate the transformation of an integrated circuit design for fabrication at foundaries with different design rules (306, 312, 6, 12).
申请公布号 WO0113284(A1) 申请公布日期 2001.02.22
申请号 WO2000US22628 申请日期 2000.08.17
申请人 AEROFLEX UTMC MICROELECTRONIC SYSTEMS INC. 发明人 GARDNER, HARRY, N.;HARRIS, DEBRA, S.;LAHEY, MICHAEL, D.;PATTON, STACIA, L.;POHLENZ, PETER, M.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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