发明名称 Fabrication method of semiconductor device using selective epitaxial growth
摘要 A fabrication method of a semiconductor device with an IGFET is provided, which makes it possible to decrease the current leakage due to electrical short-circuit between a gate electrode and source/drain regions of the IGFET through conductive grains deposited on its dielectric sidewalls. After the basic structure of the IGFET is formed, first and second single-crystal Si epitaxial layers are respectively formed on the first and second source/drain regions by a selective epitaxial growth process. Then, the surface areas of the first and second single-crystal Si epitaxial layers are oxidized, and the oxidized surface areas of the first and second single-crystal Si epitaxial layers are removed by etching. If unwanted grains of poly-Si or amorphous Si are grown on the first and second dielectric sidewalls in the selective epitaxial growth process, the unwanted grains are oxidized and removed, thereby preventing electrical short-circuit from occurring between the gate electrode and the first and second source/drain regions through the unwanted grains deposited on the first and second dielectric sidewalls.
申请公布号 US6190976(B1) 申请公布日期 2001.02.20
申请号 US19980198763 申请日期 1998.11.24
申请人 NEC CORPORATION 发明人 SHISHIGUCHI SEIICHI;YASUNAGA TOMOKO
分类号 H01L29/78;H01L21/336;H01L29/45;H01L29/49;(IPC1-7):H01L21/336 主分类号 H01L29/78
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