发明名称 Method of patterning a layer for a gate electrode of a MOS transistor
摘要 A structure is provided comprising a semiconductor substrate, a gate oxide layer on the substrate, and a polysilicon layer on the gate oxide layer. A masking layer is formed on the polysilicon layer. The masking layer is then patterned into a mask utilizing conventional photolithographic techniques, but without patterning the polysilicon layer. The photoresist layer is then removed, whereafter the mask, which is patterned out of the masking layer, is utilized for patterning the polysilicon layer. The use of a carbon free mask for patterning the polysilicon layer, instead of a conventional photoresist layer containing carbon, results in less breakthrough through the gate oxide layer when the polysilicon layer is patterned. Less breakthrough through the gate oxide layer allows for the use of thinner gate oxide layers, and finally fabricated transistors having lower threshold voltages.
申请公布号 US6191016(B1) 申请公布日期 2001.02.20
申请号 US19990226503 申请日期 1999.01.05
申请人 INTEL CORPORATION 发明人 CHAU ROBERT S.;LETSON THOMAS;STOKLEY PATRICIA;CHARVAT PETER;SCHWEINFURTH RALPH
分类号 H01L21/033;H01L21/3213;(IPC1-7):H01L21/320;H01L21/476 主分类号 H01L21/033
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