| 摘要 |
A sense circuit for multi-level flash memory cell includes a control signal generator for generating a plurality of voltage control signals, a clock signal having constant period and a plurality of control pulses according to a sense amplifier enable signal; a control voltage generator for generating multi-steps voltage according to the clock signal and the plurality of voltage control signals, sequentially supplying the multi-steps voltage to a program gate of the memory cell, generating a reference voltage according to the sense amplifier enable signal and supplying the reference voltage to a program gate of a reference cell; and a sense amplifier for sequentially comparing a plurality of data stored in the memory cell and a data of the reference cell, storing the result according to the control pulse and converting it into binary data.
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