| 摘要 |
Power semiconductor devices having tapered insulating regions include a drift region of first conductivity type therein and first and second trenches in the substrate. The first and second trenches have first and second opposing sidewalls, respectively, that define a mesa therebetween into which the drift region extends. An electrically insulating region having tapered sidewalls is also provided in each of the trenches. The tapered thickness of each of the electrically insulating regions enhances the degree of uniformity of the electric field along the sidewalls of the trenches and in the mesa and allows the power device to support higher blocking voltages despite a high concentration of dopants in the drift region. In particular, an electrically insulating region lines the first sidewall of the first trench and has a nonuniform thickness Tins(y) in a range between about 0.5 and 1.5 times Tideal(y), where Tideal(y)|y>=alpha=epsiins((2epsisEcr/qWmNd)(y-alpha)-¼Wm)/epsis and epsiins is the permittivity of the electrically insulating region, epsis is the permittivity of the drift region, Ecr is the breakdown electric field strength of the drift region, q is the electron charge, Nd is the first conductivity type doping concentration in the drift region, Wm is a width of the mesa, y is the depth, relative to a top of the first trench, at which the thickness of the electrically insulating region is being determined and alpha is a constant. The constant alpha may equal zero in the event the power device is a Schottky rectifier and may equal the depth of the P-base region/N-drift region junction in the event the power device is a vertical MOSFET.
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