| 摘要 |
In a digital phase-frequency detector with anti-backlash pulses, which prevent the mapping of very short correction pulses occurring on the basis of small phase differences by use of an AND logic circuit controlling the RESET of two flip flop circuits, a waste time is shortened by reducing a duration of the RESET pulse. The integrable phase-frequency detector according to the invention can be used in fast digital phase-locked control loops, for example for tuners, frequency synthesizers in the field of mobile radio.
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