发明名称 Semiconductor memory device having decreased layout area and method of manufacturing the same
摘要 A word line driving circuit drives four word lines in response to a signal supplied from a main row decoder through a main word line and in response to a word line driving voltage supplied from a sub-row decoder. When the word line driving circuit is not selected by the main word line, a first reset circuit allows each word line to be short-circuited. When the word line driving circuit is selected by the main word line, second to fifth reset circuits allow the non-selected word line to bear a ground potential by using a signal of the selected word line.
申请公布号 US6192000(B1) 申请公布日期 2001.02.20
申请号 US19990453038 申请日期 1999.12.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TODA HARUKI
分类号 G11C11/407;G11C8/08;G11C8/12;H01L21/8242;H01L27/108;(IPC1-7):G11C8/00 主分类号 G11C11/407
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