| 摘要 |
PROBLEM TO BE SOLVED: To shorten a test time with serial operation by providing a parallel input/output terminal inputting and outputting data for test. SOLUTION: A control terminal 310 is made a low level, a control signal is inputted to a switching control circuit 301. When the control terminal 310 is made a low level, the output of an AND gate 401 is made a low level independently of an output signal of an input/output control circuit 203. Also, the output of an inverter 402 is made a high level. Then, the output side of a buffer 404 is made high impedance. Next, a memory to be tested is selected by inputting a selection signal selecting memories 101-1 to 4 to chip selection signals 312-1 to 4. And a test is performed by inputting directly parallel data to the memories 101-4 to 4 through terminals for test 311-1 to 4. Also, an inverter may be arranged between a control terminal of the switching control circuit 301 and an input terminal of the AND gate 401, a device is made a test mode even when the terminal 310 is a high level. |
