BUS HOLD CIRCUIT WITH OVERVOLTAGE RESISTANCE

摘要

PROBLEM TO BE SOLVED: To provide a bus hold circuit which is composed only of a CMOS having an active system for dissolving an overvoltage state. SOLUTION: In conventional constitution, this bus hold circuit includes a sense circuit 30 and an arbiter circuit 40 which stop an overvoltage from affecting a latch inverter. The sense circuit includes a comparator so designed as to compare the potential of a standard high-potential power source with the potential of a signal applied to an input node of the bus hold circuit. The arbiter circuit is biased by using the potential which is higher between the two potentials and then couples the high potential with an artificial high-potential power rail. The artificial high-potential power rail electrifies the latch inverter so that the latch inverter will not be biased in the overvoltage state.