发明名称 CORRELATION DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a correlation device that can reduce power consumption, even when a fast arithmetic speed is demanded and the length of a binary code sequence is long and can directly output a binary correlation value. SOLUTION: A multiplier 11 multiplies an analog input signal x(i), sampled at a prescribed period with a corresponding binary code sequence '+1' or '-1'. An analog integrator 12 receives the output signal from the multiplier 11 and the output signal from a negative feedback circuit 15. A quantizer 13 quantizes an output signal from the analog integration device 12 at an N-level and provides an output of a binary signal, which is delayed by a digital delay circuit 14 by a unit time and the delayed signal is given to the negative feedback circuit 15. Since the level of the signal is decreased in this way, the analog integration device 12 is not saturated so as to reduce the capacitance of an integration capacitor, and a binary correlation value suitable for a post-stage block can be outputted.
申请公布号 JP2001044891(A) 申请公布日期 2001.02.16
申请号 JP20000050148 申请日期 2000.02.25
申请人 SHARP CORP;SYNCHRO DESIGN INC 发明人 IIZUKA KUNIHIKO;SENDEROWICZ DANIEL
分类号 G06G7/19;H04B1/707;H04B1/709 主分类号 G06G7/19
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