NEGATIVE BOOSTING CIRCUIT, NON-VOLATILE SEMICONDUCTOR MEMORY USING IT, AND SEMICONDUCTOR CIRCUIT DEVICE

摘要

PROBLEM TO BE SOLVED: To shorten a recovery time by suppressing influence of a parasitic bipolar transistor of a substrate in a negative boosting circuit. SOLUTION: This device is provided with an intermediate node reset circuit 103 that the effect of a parasitic NPN bipolar transistor of a substrate is suppressed using a N channel MOS transistor having triple well structure which can set arbitrarily a substrate potential, electric charges of capacitors connected in series generated at the time of boosting operation are reset at the time of boosting non-operation. Thereby, a negative boosting circuit that high efficiency and low voltage operation by a N channel MOS transistor can be performed, a recovery time is short, and power consumption at the time of recovery is suppressed can be realized.