发明名称 INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To form a low-stress, high-quality, and very thin oxide layer on a substrate by setting the interface trap density of the oxide layer within a predetermined range. SOLUTION: An oxide layer 30 formed on a substrate 22 has a first oxide portion 31 and a second oxide portion 32. The portion 32 and the substrate 22 form an interface 34. The interface 34 is planar, and has a surface roughness of as low as about 0.3 nm or less. Further, the interface 34 is stress-free, and its compression stress is in the order from about 0 to about 2×109 dynes/cm2. This means that its defect density is in the order of about 0.1 defects/cm2 or less. Further, the portion 32 is assumed to have higher density than those of conventional oxides. The interface trap density of the portion 32 is in the order of about 5×1010/cm2 or less.
申请公布号 JP2001044194(A) 申请公布日期 2001.02.16
申请号 JP20000190017 申请日期 2000.06.23
申请人 LUCENT TECHNOL INC 发明人 YANNIN CHEN;SUNDAA SURINIBASAN;MERCHANT SAILESH MANSINH;ROY PRADIP KUMAR
分类号 H01L27/04;C30B33/00;H01L21/28;H01L21/31;H01L21/316;H01L21/336;H01L21/469;H01L21/76;H01L21/822;H01L21/8232;H01L21/8238;H01L27/092;H01L29/51;H01L29/78;H01L29/786;(IPC1-7):H01L21/316 主分类号 H01L27/04
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