| 摘要 |
A non-volatile memory cell comprises a first well region of a first conductivity type within a second well region of a second conductivity type in a substrate. At least one impurity region of an opposite conductivity type to said first conductivity type is formed in the first well as is a well tap region of said first conductivity type. An isolation gate is formed on the surface of the substrate between said at least one impurity region and said well tap region. |
