发明名称 CIRCUIT FOR PRECHARGING BIT LINE
摘要 PURPOSE: A circuit for precharging a bit line is provided to operate an SRAM(Static Random Access Memory) cell at a high speed when the read operation of SRAM cell is performed. CONSTITUTION: A circuit for precharging a bit line includes a bit line pull-up circuit(60), a plurality of an SRAM(Static Random Access Memory) cell(70), a column select circuit(80) and a sense amplifier(90). The bit line pull-up circuit has the first through third PMOS transistors(51-53) and the first and second NMOS transistors(54-55). The first and second PMOS transistors receive an inverted bit line precharge signal(BPB) and pull up in DC(Direct Current) a bit line(B/L) and a bit bar line(/B/L) when the inverted bit line precharge signal is logically low. The third PMOS transistor has a gate receiving a bit line precharge signal(BP) and the inverted bit line precharge signal. When the inverted bit line precharge signal is logically high and the bit line precharge signal is logically low, the third PMOS transistor precharges AC(Alternative Current) the bit line and the bit bar line with a threshold voltage of the first and second PMOS transistors.
申请公布号 KR20010010888(A) 申请公布日期 2001.02.15
申请号 KR19990030010 申请日期 1999.07.23
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 KIM, JAE UN
分类号 G11C11/413;(IPC1-7):G11C11/413 主分类号 G11C11/413
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