INTERPOLATION FINITE IMPULSE FILTER

摘要

PURPOSE: An interpolation finite impulse filter is provided to be capable of outputting four different output values of filters at the same time. CONSTITUTION: Input registers(100-103) store corresponding filter inputs(fi0, fi1, fi2, fi3) in which are inputted for period of the first clock signal(CK1). An input distributor(104) selects one of four 12-bit input data stored in the input registers(100-103) depending on the first and second clock signals(CK1, CK2). Look-up tables(105-108) perform a filter operation to each coefficient group of input data selected by the input distributor(104). A pipeline register(200) delays a filter output of each of the look-up tables(106-108) in order to serially output filter outputs related to each coefficient group generated in parallel and simultaneously from the loop-up tables(105-108). An output alignment circuit(201) selects one of filter outputs of the loop-up table(105) and the pipeline register(200) in response to the first and second clock signals(CK1, CK2). A pipeline register(202) delays filter outputs of the output alignment circuit(201) to output filter signals(fo0, fo1, fo2, fo3).