发明名称 Dual gate semiconductor device for shortening channel length
摘要 In a semiconductor device including a MOSFET, a first semiconductor layer is formed over a silicon substrate and has a gate region. Further, a second semiconductor layer is formed over the first semiconductor layer with a gate oxide film therebetween, and has an active region. The active region has a source region, a drain region and a channel region. An insulator layer on the active region encloses a back gate wiring layer.
申请公布号 US6188111(B1) 申请公布日期 2001.02.13
申请号 US19980052157 申请日期 1998.03.31
申请人 NEC CORPORATION 发明人 KUMAGAI KOUICHI
分类号 H01L29/78;H01L21/336;H01L27/12;H01L29/786;(IPC1-7):H01L29/74 主分类号 H01L29/78
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