发明名称 |
Method of fabricating a DRAM capacitor |
摘要 |
A method of fabricating a DRAM capacitor. A conductive layer and an amorphous silicon layer are formed on a substrate having a dielectric layer. The amorphous silicon layer and the conductive layer are etched to form a region of a capacitor to expose a portion of the dielectric layer. An opening with a profile having a wider upper portion and a narrower lower portion is formed within the conductive layer, and through the opening, the dielectric layer is then etched through to form a node contact window to expose the substrate. An amorphous silicon spacer is formed on the sidewall of conductive layer of the region of the capacitor and fills the node contact window. A selective HSG-Si, a dielectric layer and a polysilicon layer are formed to achieve the fabrication of the capacitor. The conductive layer, the amorphous silicon layer and the HSG-Si serve as a lower electrode of the capacitor and the polysilicon layer serves as an upper electrode of the capacitor.
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申请公布号 |
US6187629(B1) |
申请公布日期 |
2001.02.13 |
申请号 |
US19980206109 |
申请日期 |
1998.12.04 |
申请人 |
UNITED SEMICONDUCTOR CORP. |
发明人 |
GAU JING-HORNG;HUANG HSIU-WEN;SZE JHY-JYI |
分类号 |
H01L21/02;H01L21/768;H01L21/8242;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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