ARCHITECTURE FOR INCREASING DENSITY OF CHANNEL BANK IN DIGITAL CARRIER SYSTEM

摘要

A double density channel bank architecture compatible with an existing D4 backplane and D4 channel units transmits or receive PCM data on the PAM bus, while simultaneously transmitting or receiving PCM data on the PCM bus. A double density channel unit (CU) provides data for two transmit and two receive T-1 timeslo ts to increase the capacity of a D4 channel bank from 48 channels to 96 channels. Channel bank timing of PCM data on the PAM bus provides isolation of PCM data and PA M signals on PAM bus. Double density transmit and receive units each support a n additional DS1. The receive unit transmits a signal on both CU channels to indicate T-1 failure and to commence trunk processing.