发明名称 |
Vertical bipolar SRAM cell, array and system, and a method for making the cell and the array |
摘要 |
An SRAM memory cell is provided in which a pair of cross-coupled n-type MOS pull-down transistors are coupled to respective parasitically formed bipolar pull-up transistors. The memory cell is formed within a semiconductor layer which extends over a buried layer. The bipolar transistors are formed parasitically from the buried layer and the semiconductor layer used to form the pull-down transistors. The bases of the bipolar transistors may also be dynamically controlled. An SRAM memory array having a plurality of such memory cells and a computer system incorporating the SRAM memory array are also provided.
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申请公布号 |
US6187618(B1) |
申请公布日期 |
2001.02.13 |
申请号 |
US19990249469 |
申请日期 |
1999.02.12 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
KAO DAVID A.;AHMED FAWAD |
分类号 |
G11C11/41;H01L21/8244;H01L27/07;H01L27/11;(IPC1-7):H01L21/331 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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