| 摘要 |
An integrated circuit has a memory array comprising memory devices formed in a multiplicity of electrically isolated semiconductor regions that share a common set of bit lines. A given semiconductor region, typically a tub, is biased to a given voltage if a memory cell formed in that tub is accessed for a write operation, and biased to another voltage at other times. Although there may be many memory devices along the same bit line, during programming only the memory devices in the selected tub will be disturbed by the tub bias. Other memory devices residing in unselected tubs are protected against the bit line disturb. The present technique is especially advantageous when used with flash EEPROM memory cells that utilize secondary electron injection to assist in programming the cells.
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