发明名称 METHOD AND DEVICE FOR REPRODUCING CLOCK AND DATA REPRODUCING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a stable reproducing clock signal for detecting regenerative data from a binarized signal. SOLUTION: First and second binarized signals S21 and S22 are provided by branching a binarized signal S2. An error signal PE1 is provided by comparing the phases of a reproducing clock signal CLK and the rising edge of the binarized signal S21 and an error signal PE2 is provided by comparing the phases of that clock signal CLK and the falling edge of the binarized signal S22. A differential signal ED of the signals PE1 and PE2 is supplied through a filter 184 to a delay circuit 172 and a delay quantity is controlled. A signal EA as the sum of the error signals PE1 and PE2 is supplied through a filter 186 to a VCO 181 and the frequency of the clock signal CLK is controlled. The clock signal CLK is respectively synchronized to the rising edge and falling edge of the binarized signals S21 and S22. In a data detecting circuit 190, the regenerative data of one system can be satisfactorily detected from the binarized signals S21 and S22 while using the clock signal CLK.
申请公布号 JP2001035094(A) 申请公布日期 2001.02.09
申请号 JP19990205359 申请日期 1999.07.19
申请人 SONY CORP 发明人 YOSHIMURA SHUNJI
分类号 G11B20/14;G11B11/105;H03L7/08;H03L7/085;H03L7/087;H04L7/027 主分类号 G11B20/14
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