| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a picture processor capable of reducing the area of a substrate, power consumption and cost by using the same FIFO line memory for enlargement and reduction at the time of executing variable power processing in a main scanning direction and capable of executing variable power processing by fixing the speed of a scanning unit for reading out picture data at the time of executing variable power processing in a sub-scanning direction. SOLUTION: In the case of extending an image in the main scanning direction, picture data are passed from a CCD board 300 through the gate (b) of a selector 1, written/read out in/from a FIFO memory 4 and written in a memory 26 built in a variable power unit 5 from the gate (b) of a selector 2. The unit 5 reads out picture data from the memory 26 plural times in accordance with an enlargement ratio to change the scale of the picture data. Then the picture data are outputted to an LSU unit 46 through the gate (a) of a selector 3. In the case of reducing an image, picture data are passed from the board 300 through the gate (a) of the selector 2, inputted to the unit 5 to change the scale of the image, the processed picture data are passed through the gate (a) of the selector 1, written/read out in/from the memory 4, and outputted to the LSU unit 46 through the gate (b) of the selector 3.</p> |
