| 摘要 |
PROBLEM TO BE SOLVED: To conduct effectively a phase margin test of a plurality of clocks by arranging a phase testing circuit in a system LSI requiring a plurality of clocks. SOLUTION: In a testing method of phase between input clocks of a semiconductor integrated circuit device (system LSI) needing a plurality of clocks, arbitrary clocks, e.g. a CLOCK1 and a CLOCK2 are selected out of a plurality of clocks, CLOCK1-CLOCKN. Inverted data Q bar which are transferred from a flip-flop 2 are selected by using the selected clocks, and held as time series data by using a timing check circuit 400. By comparing the time series data with expectation data, phase check is collectively performed regarding the selected clocks.
|
