| 摘要 |
PROBLEM TO BE SOLVED: To increase the number of wirings between chips and to realize a speedup and a low power consumption without increasing cost. SOLUTION: A DRAM chip 1 and a logic circuit chip 2 are separately fabricated and then they are fixed to an island 3. An interlayer insulating film 4 made of SOG and to be planarized is formed on the whole surfaces of the DRAM chip 1 and the logic circuit chip 2. A connecting hole 4a is made in the interlayer insulating film 4 and a W plug 5a is buried in the connecting hole 4a. A wiring made of Al film and for connecting chips and a bonding pad 7 are formed on the interlayer insulating film 4. Then, a passivation film 8 is formed and then the passivation film 8 on the bonding pad 7 is removed and then a bonding wire 9 is bonded to the bonding pad 7 and the lead 10 and then they are packaged. In this way, a package 11 is fabricated. |
