发明名称 D/A CONVERTER
摘要 PROBLEM TO BE SOLVED: To output analog data of high quality less affected by a clock jitter even if D/A conversion is executed by installing a digital filter attenuating delta/sigma modulation data. SOLUTION: A digital filter is installed behind a delta/sigma modulator 1 and the high-pass component of digital data is attenuated. Since the edge of a pulse waveform after digital/sigma modulation fluctuates, a pulse area changes at random and noise occurs. Thus, the occurrences of the edge of the pulse waveform is reduced and therefore the affect of a clock jitter can be suppressed. The reduction of the occurrences of the edge in the pulse waveform is equal to the attenuation of the high-pass noise of noise shaping. Consequently, the delta/sigma modulator 1 executes digital modulation and the digital filter 2 suppresses high pass noise. Then, a sampling rate can be reduced by sufficiently attenuating high pass noise.
申请公布号 JP2001036409(A) 申请公布日期 2001.02.09
申请号 JP19990209354 申请日期 1999.07.23
申请人 DIGIAN TECHNOLOGY INC 发明人 MUROTA TOSHIO;SHINOHARA SHIGEAKI
分类号 H03M3/02;(IPC1-7):H03M3/02 主分类号 H03M3/02
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