发明名称 SYSTEM AND METHOD FOR MEMORY ACCESS
摘要 PROBLEM TO BE SOLVED: To improve the processing capacity of the whole of a memory access system by shortening the time of access to an external memory part and improving the throughput of transfer to other signal processing parts, and to decrease the cost of the whole system and the number of components and to decrease the occupation rate of components on the same substrate where the system is constituted. SOLUTION: A signal processing processor part 101 is equipped with a dedicated port which multiplexes and transfers an address given read/write information at its head with data 107, generates a frame signal 108 every time the transfer is performed, and generates a pointer signal 106 specifying an address in synchronism with the frame signal 108 of arbitrary timing. An address control part 103 holds the address according to the pointer signal 106, increases this held address in synchronism with the frame signal 108, and controls data access according to storage areas and read/write information of external memory parts 104 and 105 that the address indicates.
申请公布号 JP2001034573(A) 申请公布日期 2001.02.09
申请号 JP19990208720 申请日期 1999.07.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ITO HIROYUKI
分类号 G06F15/16;G06F12/02;G06F12/06;G06F13/16;(IPC1-7):G06F13/16 主分类号 G06F15/16
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