发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To enable redundancy relieving even if both of adjacent column lines are defective by providing a redundancy control circuit group selecting one of selection signals outputted by a first decoder of k-th or (k+1)-th out of first decoders of (n) pieces and a second decoder section of (n+1) pieces supplying the selected signal selected by each redundant control circuit to each column line group of (n+1) pieces. SOLUTION: A redundant control circuit RL(k) selects either of output signals YD(k), YD(k+1) from first decoders DA(K-1), DA(k) conforming to the redundant control circuits RL(k-1) and redundant selection signals RE(k), REb(k), and REb(k+1) generated by the circuit RL(k), and outputs them to second decoders DB(2k), DB(2k+1) through a node DEC(k). When the second decoders DB(k), DB(k+1) are selected by an input column address signal PY0, power source voltage Vcc is applied to a column line CL(2k), CL(2k+1).
申请公布号 JP2001035182(A) 申请公布日期 2001.02.09
申请号 JP19990211335 申请日期 1999.07.26
申请人 OKI ELECTRIC IND CO LTD 发明人 MIYAZAKI KOICHI;MATSUI KATSUAKI
分类号 G06F12/16;G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G06F12/16
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