发明名称 CMOS INVERTER
摘要 PROBLEM TO BE SOLVED: To enable high integration while reducing energy loss and heat to be generated in discharging operation from parasitic capacity, accompanying the ON/OFF operation of an MOSFET. SOLUTION: In this CMOS inverter, first switching means 3, 7 and 8 are turned on for fixed time in synchronism with the fall of an input voltage, second switching means 4, 9 and 10 are turned on synchronously for fixed time with the rise of the input voltage and third switching means 11, 13, 15, 16 and 17 are turned on after the lapse of fixed time from the fall of the input voltage and turned off synchronously with the rise of the input voltage. Furthermore, fourth switching means 12, 14, 18, 19 and 20 are turned on, after the lapse of fixed time from the rise of the input voltage and turned off synchronously with the fall of the input voltage.
申请公布号 JP2001036399(A) 申请公布日期 2001.02.09
申请号 JP19990208104 申请日期 1999.07.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOSHIDA KOJI
分类号 H03K17/687;H03K19/0948;(IPC1-7):H03K19/094 主分类号 H03K17/687
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