发明名称 DATA TRANSFER CONTROLLER AND ELECTRONIC DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a data transfer controller that realizes high speed data transfer by reducing an overhead of processing of a firmware and to provide an electronic device. SOLUTION: In a data transfer controller in compliance with the IEEE1394 standards, on the occurrence of a header CRC error, a header pointer is returned to a preceding position to inactivate a packet, and in the case of Unktcode, the packet is inactivated by not writing the packet to a RAM. Furthermore, a reception end status is not generated. A register storing a status of a header CRC error is provided. On the occurrence of a data CRC error, the header pointer is not restored but the data pointer is restored to the preceding position. A 1st mode inactivating a received broadcast packet and a 2nd mode validating it can be set. In the case of receiving a broadcast packet in the 1st mode, the packet it not written in the RAM.
申请公布号 JP2001036548(A) 申请公布日期 2001.02.09
申请号 JP19990201249 申请日期 1999.07.15
申请人 SEIKO EPSON CORP 发明人 ISHIDA TAKUYA
分类号 G06F11/10;G06F13/38;H04L12/46;H04L12/64;(IPC1-7):H04L12/40 主分类号 G06F11/10
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