| 摘要 |
With regard to the increasing application of portable computing power in the form of lap-top and similar computers, weight and size considerations guide endeavors to provide a device for reducing their noise sensitivity, particularly to extraneous noise, without incurring high design costs, and using faster but more expensive clock circuits In the proposal, a first circuit now provides a periodic binary digital signal via a transmission path and a second circuit measures a preselected period of time of each desired transition from one state into the other state of the digital signal, with the first circuit connected to the second so as to output a binary digital signal, as a reply to the output signal of the second, in one state, while the second circuit measures the preselected time period., The first circuit is a D-flip-flop, and the second circuit contains a clock.
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