发明名称 Process for forming ultra-shallow source/drain extensions
摘要 A method of fabricating an integrated circuit with ultra-shallow source and drain junctions utilizes a dummy or sacrificial gate spacer. Ions are implanted and dopants are provided through the openings associated with sacrificial spacers to form the source and drain extensions. The openings can be filled with an insulative layer. The process can be utilized for P-channel or N-channel metal oxide semiconductor field effect transistors (MOSFETS).
申请公布号 US6184097(B1) 申请公布日期 2001.02.06
申请号 US19990255604 申请日期 1999.02.22
申请人 ADVANCED MICRO DEVICES, INC. 发明人 YU BIN
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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