发明名称 |
Semiconductor memory device with reduced power consumption and stable operation in data holding state |
摘要 |
The semiconductor memory device has a normal operation mode and a self-refresh mode, and includes a VBB generation circuit generating a first substrate voltage when an internal power supply voltage is larger than a predetermined value and a second substrate voltage of an absolute value smaller than that of the first substrate voltage when VCC is smaller than the predetermined value, a bit line equivalent voltage generation circuit outputting voltage VCC/2 produced by resistive dividing when internal power supply voltage is lower than the predetermined value in self-refresh mode, a 4KE signal generation circuit generating a signal for performing a 4K operation in the self-refresh mode when internal power supply voltage is lower than the predetermined value and a refresh address generation circuit.
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申请公布号 |
US6185144(B1) |
申请公布日期 |
2001.02.06 |
申请号 |
US19990455461 |
申请日期 |
1999.12.06 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
SUZUKI TOMIO |
分类号 |
G11C11/407;G11C5/14;G11C11/403;G11C11/406;G11C11/4074;G11C11/408;H01L21/822;H01L27/04;(IPC1-7):G11C11/24 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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