发明名称 Address trap comparator capable of carrying out high speed fault detecting test
摘要 In an N-bit address trap comparator, an N-bit address trap register stores an N-bit reference address, a bit-by-bit comparator compares an N-bit address with the N-bit reference address bit-by-bit, and an all-bit comparator detects whether or not all outputs of the bit-by-bit comparator have the same value. In a test mode the N-bit reference address is reset so that a first bit of the N-bit reference address is caused to be a first binary value and other bits are caused to be a second binary value. Also, the second binary value is set in all bits of the N-bit address, and then, the N-bit reference address is shifted within the N-bit address trap register.
申请公布号 US6185714(B1) 申请公布日期 2001.02.06
申请号 US19980092087 申请日期 1998.06.05
申请人 NEC CORPORATION 发明人 SATOH KAZUAKI
分类号 G06F11/22;G01R31/28;G06F11/263;(IPC1-7):G01R31/28 主分类号 G06F11/22
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