| 摘要 |
A voltage regulator circuit (1) able to detect a latch-up phenomenon disturbing the voltage to be regulated, to suppress such phenomenon and re-establish the voltage at a predetermined level. The circuit a bipolar transistor (2), a resistor (5) and substantially constant voltage supply means (6). The circuit (1) also includes voltage detection means (11) arranged to receive the regulated voltage (Vreg), and to supply a control voltage to said transistor (2) which can control the switching thereof between a conducting state and a blocked state, so that the transistor (2) is in the blocked state when latch-up causes the regulated voltage to drop below a first voltage level, and so that the transistor (2) is in the conducting state when the regulated voltage is lower than a second voltage level, the latch-up being suppressed below such level.
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